I read an article inwards 1 of the publications nosotros advertise inwards lately where an Engineer had designed a timing circuit, simply when he tested it, the frequency was likewise high. He rechecked his calculations together with institute out from the capacitor datasheet that the value of the detail multilayer ceramic capacitor he had chosen, changes amongst the applied voltage.
I did non pay much attending to it, beingness to a greater extent than involved amongst ability supplies, until I was talking amongst 1 of our TDK-Lambda Engineers regarding non isolated POL (Point of Load) converters, together with he gave me the same alert almost the value alternative of the filter capacitors. This is covered inwards the ceramic capacitor datasheets nether DC Bias characteristics.
POL converters rely on quite large ceramic capacitors on the input together with output to cut down the final result of the fast transient currents drawn past times FPGAs, (which tin drive the output voltage to deviate), amongst values sometimes approaching 2,000uF.
The job organization our Engineer had was that our customers mightiness non know almost this. Intrigued I decided to investigate. Below is the DC-Bias Characteristic for a 22uF 16V multilayer ceramic capacitor.
If a capacitor value of 22uF was recommended past times the application banking concern annotation for filtering the 12V input voltage on a non-isolated converter together with the user picked this detail part, inwards actuality, the existent capacitance would hold upwardly closer to 12uF.
Upon testing the filtering, the user mightiness complain that the application banking concern annotation was incorrect, whereas inwards fact the capacitor datasheet had non been interpreted correctly.
Something to acquit inwards mind!
Power Guy
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